OpenMFDA Foundry

Tools & Resources

The free software and data our design tools are built from. Every link goes to the original project, where you will find instructions if they exist. Looking for chip designs you can print instead? Those are in the Library.

At the end, kept apart, are two related projects from the Nordin group at BYU. Our tools are not built from them.

Pipeline

openmfda_flow

MIT licensed · Active

Our design software. You describe the chip you want, and it works out the layout and produces a 3D file to print. Free and open source.

Technical details

The end-to-end RTL-to-STL microfluidic design pipeline.

The OpenMFDA pipeline takes a Verilog netlist describing a chip's components and connections, runs Yosys synthesis, OpenROAD place-and-route, OpenSCAD geometry generation, and Xyce simulation, then emits a printable STL plus a control schedule.

Quick start (Docker)

git clone https://github.com/utah-MFDA/openmfda_flow
cd openmfda_flow
git submodule update --init --recursive
python3 run_mfda_docker.py --design smart_toilet

You'll get: a placed chip layout (flow/results/smart_toilet/), the printable smart_toilet_base.scad, simulation outputs (Chem_Eval.csv, *_xyceOut.csv).

AuthorsGoenner, Temple, Zapata, Wakeham, Snelgrove, Gaillardon, Nordin, Gale (Gale Lab / LNIS / Nordin Group)

CitationGoenner et al. 2025, Scientific Reports — 10.1038/s41598-025-15976-9

Repogithub.com/utah-MFDA/openmfda_flow

Design libraries

Microchannel drawing library (OpenSCAD)

Active · OpenSCAD library

A small piece of code for drawing the winding channels that carry liquid through a chip. Other people can use it in their own designs.

Technical details

part of openscad_for_microfluidics

A library for generating complex microfluidic channels in OpenSCAD.

Polychannel generates multi-segment channels, serpentines, and xy/xz/yz arc bends from compact parameter specs. Drop the .scad file into your project and use <polychannel.scad>; — that's the whole install.

Heavily illustrated documentation: 100+ rendered examples in the upstream README showing channel families, bend geometries, and serpentine patterns. The best onboarding of any repo in the OpenMFDA ecosystem.

Heads up: the repo link points directly to polychannel/, not the root of openscad_for_microfluidics — the root README is a 41-byte stub; the polychannel subdirectory has the real tutorial.

Repository namepolychannel (in openscad_for_microfluidics)

Originally fromBYU / Nordin Group (forked to utah-MFDA)

Repogithub.com/utah-MFDA/openscad_for_microfluidics/tree/main/polychannel

Process design kit (PDK) for the BYU 3D printer

Active · Developer-facing

The settings and building blocks our design software needs in order to make chips for one particular 3D printer.

Technical details

The process design kit for the H.R.3.3 DLP printer.

The PDK the OpenMFDA pipeline targets by default. 93 parametric component cells (pumps, valves, mixers, channels, chambers) each paired with LEF abstracts and Verilog-AMS analog models. The pipeline consumes this PDK to lay out chips.

Build the merged libraries

make build_scad     # produces h.r.3.3_merged.scad
make build_lef      # produces h.r.3.3_merged.lef
make build_va       # produces MFXyce.so plugin (needs Xyce + ADMS)
Heads up: component-level docs are in Microsoft Word format under docs/. Not directly web-viewable — see the repo to download.

Repository nameh.r.3.3_pdk

Repogithub.com/utah-MFDA/h.r.3.3_pdk

Data & simulation

Benchmark set of example chip designs

Active · Dataset

A collection of 174 example chip descriptions, sorted into 17 groups. Researchers use sets like this to compare design software fairly. It has no licence yet, so reuse needs its authors’ permission.

Technical details

174 Verilog netlists in 17 category folders, plus a shared logic-gate library (gates.v), on the repository’s default branch (counted 2 October 2026).

The OpenMFDA benchmark suite. Application categories include braid networks, binary trees, gradient generators, primitive graphs (chains, chain mixers, complete and complete bipartite graphs), plus biology-motivated designs (HIV-1 detection, mRNA isolation, ChIP-seq, kinase activity assays, in vitro diagnostics, protein assays, PCR mixing trees). Used to benchmark microfluidic design automation algorithms against published baselines (Columba S, Fluigi).

This is a dataset, not a runnable tool. Each application category links to a paper from the originating biology literature; per-category READMEs show the topology diagrams.

The repository has no licence file, so copying, changing or sharing the netlists needs its authors’ permission. This site does not host a copy: the Benchmark Suite library page describes the set and links the repository.

Repository namemfda_benchmarks

CitationTseng et al., Columba S (DAC 2018) for the benchmark methodology comparison.

Repogithub.com/utah-MFDA/mfda_benchmarks

Microfluidic circuit simulator

Active · Developer tool

A program that predicts how liquid will move through a chip before you print it, so you can try a design out on screen first.

Technical details

A standalone microfluidic circuit simulator using modified nodal analysis.

Solves for pressure, flow rate, and chemical concentration through a microfluidic network via the Xyce SPICE engine. Used both on its own, to simulate a design before it is printed, and as the simulation backend the pipeline calls.

Run via Docker (avoids local Xyce build)

docker run -dit bgoenner/mfda_xyce
# then in the container:
python3 runMFDASim.py --netlist <chip.v> --design <name> \
  --lib <lib.csv> --plot True
Heads up: many arguments, submodules to init, no single copy-paste worked example in the upstream README. See the repo's “Getting started” section for the full argument list.

Repository namesimulation

Repogithub.com/utah-MFDA/simulation